Computing systems may include multiple processors with asynchronous interfaces between clusters. The clusters may operate asynchronously from one another and may have multiple asynchronous clock domains. In testing the processors, it may be desirable to test the asynchronous interfaces between the clusters, in a synchronous mode, with cycle by cycle accuracy. Thus, testing the processors may require the matching and/or aligning of multiple asynchronous clock domains. Typically, the alignment may take place at the pin boundaries of the system (where the pins may be located at the perimeter of the system).
When testing the clusters that are internal to the system, the test often requires cycle by cycle accuracy and accordingly, aligning the clocks at the pin boundaries. However, it may be difficult to align the clocks at the pin boundaries with cycle by cycle accuracy. Thus, a method of internally aligning multiple asynchronous clock domains is desirable. Accordingly, there is a need in the art for an improved method for allowing the synchronous operation of a system with multiple asynchronous clock domains.